1. Field of the Invention
This invention relates to the field of microprocessors and, more particularly, to comparing NaNs within floating point units of microprocessors.
2. Description of the Related Art
Superscalar microprocessors achieve high performance by executing multiple instructions per clock cycle and by choosing the shortest possible clock cycle consistent with the design. As used herein, the term "clock cycle" refers to an interval of time accorded to various stages of an instruction processing pipeline within the microprocessor. Storage devices (e.g. registers and arrays) capture their values according to the clock cycle. For example, a storage device may capture a value according to a rising or falling edge of a clock signal defining the clock cycle. The storage device then stores the value until the subsequent rising or falling edge of the clock signal, respectively. The term "instruction processing pipeline" is used herein to refer to the logic circuits employed to process instructions in a pipelined fashion. Generally speaking, a pipeline comprises a number of stages at which portions of a particular task are performed. Different stages may simultaneously operate upon different items, thereby increasing overall throughput. Although the instruction processing pipeline may be divided into any number of stages at which portions of instruction processing are performed, instruction processing generally comprises fetching the instruction, decoding the instruction, executing the instruction, and storing the execution results in the destination identified by the instruction.
Microprocessors are configured to operate upon various data types in response to various instructions. For example, certain instructions are defined to operate upon an integer data type. The bits representing an integer form the digits of the number. The binary point is assumed to be to the right of the digits (i.e. integers are whole numbers). Another data type often employed in microprocessors is the floating point data type. Floating point numbers are represented by a significand and an exponent. The base for the floating point number is raised to the power of the exponent and multiplied by the significand to arrive at the number represented. While any base may be used, base 2 is common in many microprocessors. The significand comprises a number of bits used to represent the most significant digits of the number. Typically, the significand comprises one bit to the left of the binary point, and the remaining bits to the right of the binary point. The bit to the left of the binary point is not explicitly stored, instead it is implied in the format of the number. Generally, the exponent and the significand of the floating point number are stored. Additional information regarding the floating point numbers and operations performed thereon may be obtained in the Institute of Electrical and Electronic Engineers (IEEE) Standard 754. IEEE Standard 754 is herein incorporated by reference in its entirety.
Floating point numbers can represent numbers within a much larger range than can integer numbers. For example, a 32 bit signed integer can represent the integers between 2.sup.31 -1 and -2.sup.31, when two's complement format is used. A single precision floating point number as defined by IEEE Standard 754 comprises 32 bits (a one bit sign, 8 bit biased exponent, and 24 bits of significand) and has a range from 2.sup.-126 to 2.sup.127 in both positive and negative numbers. A double precision (64 bit) floating point value has a range from 2.sup.-1022 and 2.sup.1023 in both positive and negative numbers. Finally, an extended precision (80 bit) floating point number has a range from 2.sup.-16382 to 2.sup.16383 in both positive and negative numbers.
The expanded range available using the floating point data type is advantageous for many types of calculations in which large variations in the magnitude of numbers can be expected, as well as in computationally intensive tasks in which intermediate results may vary widely in magnitude from the input values and output values. Still further, greater precision may be available in floating point data types than is available in integer data types.
Several special floating point data representations are defined. These special floating point data representations are referred to as "special floating point numbers." Specific encodings are assigned for each special floating point number. Special floating point numbers may include special encodings for zero, + and - infinity, denormalized numbers, and not a number (NaN). NaNs may include signaling NaNs (SNaNs) and quiet NaNs (QNaNs). Quiet NaNs may be output as a response to an invalid operation or as the result of an operand in which at least one operand is a QNaN. Signaling NaNs are typically not generated by an FPU. A programmer can use an SNaN to trap into the exception handler and the bit combination of the SNaN can be used to pass information to the exception handler.
Although no combination of significand and exponent define a value of infinity, a special encoding is defined to represent infinity. Zero may be represented by a significand of zero and any exponent, but this representation would use many encodings to represent zero. For example, a single precision number with an 8-bit exponent would have 64 different encodings that represent zero. To make the maximum utilization of the possible encodings, one special encoding is defined to represent zero. NaN is an encoding that represents a number that is not an ordinary number. For example, the square root of a negative number is a NaN. At least one special encoding is defined to represent a NaN. A group of special encodings may be defined for numbers that are denormalized. As noted above, the significand typically comprises one bit to the left of the binary point and that bit is implied to be a one. If a number is denormalized, the bit to the left of the binary point is zero rather than one. Denormalized numbers do not have one specific encoding such as the encodings for zero and infinity. Denormalized numbers typically have a series of encodings. For example, a series of encodings where the exponent is all zeros and the significand represents the numerical value of the denormalized number can be used. Denormalized numbers are used to represent floating point values less than the normalized minimum number. For example, in a single precision floating point number, denormalized numbers may be used to represent numbers less than 1.times.2.sup.-126.
Special rules for performing floating point operations with special floating point numbers are defined. These special rules may define a specific result for a floating point operation involving special floating point numbers. For example, the result of any operation with an operand that is a NaN is also a NaN. Special rules also define a result of a floating point operation in which both input operands are NaNs. The NaN with the larger significand is converted to a QNaN and returned as a result. Unfortunately, existing circuits for comparing the significands and sign bits of NaNs are relatively slow and require a relatively large amount of circuit area. What is desired is a faster and smaller circuit for comparing NaN inputs.